The AD7836 accepts 14-bit parallel loaded data from the exter-nal bus into one of the input latches under the control of the WR, CS and DAC channel address pins, A0–A2.
The DAC outputs are updated individually, on reception of new data. In addition, the SEL input can be used to apply the user programmed value in DAC Register E to all DACs, thus setting all DAC output voltages to the same level. The contents of the DAC data registers are not affected by the SEL input.
Each DAC output is buffered with a gain of two amplifier into which an external DAC offset voltage can be inserted via the DUTGNDx pins.
The AD7836 is available in a 44-pin PQFP package.