The applied external reference, VREF, determines the full-scale output voltage. Valid VREF values include VSS < VREF < VDD that result in a wide selection of full-scale outputs. For multiplying applications, ac inputs can be as large as ±5 VP.
A doubled-buffered serial-data interface offers high speed, 3-wire, SPI- and microcontroller-compatible inputs using serial data-in (SDI), clock (CLK) and a chip-select (CS). A common level-sensitive, load-DAC strobe (LDAC) input allows simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to zero at system turn on. An external asynchronous reset (RS) also forces all registers to the zero code state. A programmable power-shutdown feature reduces power dissipation on unused DACs.