The AD669's architecture insures 15-bit monotonicity over temperature. Integral nonlinearity is maintained at ±0.003%, while differential nonlinearity is ±0.003% max. The on-chip output amplifier provides a voltage output settling time of 10 ms to within 1/2 LSB for a full-scale step.
Data is loaded into the AD669 in a parallel 16-bit format. The double-buffered latch structure eliminates data skew errors and provides for simultaneous updating of DACs in a multi-DAC system. Three TTL/LSTTL/5 V CMOS compatible signals control the latches: CS, L1 and LDAC.
The output range of the AD669 is pin programmable and can be set to provide a unipolar output range of 0 V to +10 V or a bipolar output range of -10 V to +10 V.
The AD669 is available in seven grades: AN and BN versions are specified from -40°C to +85°C and are packaged in a 28-pin plastic DIP. The AR and BR versions are specified for -40°C to +85°C operation and are packaged in a 28-pin SOIC. The SQ version is specified from -55°C to +125°C and is packaged in a hermetic 28-pin cerdip package. The AD669 is also available compliant to MIL-STD-883. Refer to the AD669/883B data sheet for specifications and test conditions.