The parallel interface octal output voltage D/A converter with buffered/unbuffered reference input. These devices incorporate an on-chip output buffer that can drive the output to both supply rails and also allow a choice of buffered or unbuffered reference input.
The AD5347 have a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR. A readback feature allows the internal DAC registers to be read back through the digital port.
An asynchronous CLR input is also provided, which resets the contents of the input register and the DAC register to all zeros. These devices also incorporate a power-on-reset circuit that ensures that the DAC output powers on to 0V and remains there until valid data is written to the device. All three parts are pin-compatible, which allows the user to select the amount of resolution appropriate for their application without redesigning their circuit board.
- 1.4mA at 3V low power operation
- Power-down to 100nA at 3V/240nAat 5V
- Guaranteed monotonic by design over all codes
- Power-on reset to zero volts
- Asynchronous CLR facility
- Simultaneous update of DAC outputs via LDAC pin
- Buffered/unbuffered reference input
- 20ns WR time
- 38-lead TSSOP/6mm x 6mm 40-lead CSP packaging
- Applications:
- Portable battery-powered instruments
- Digital gain and offset adjustment
- Programmable voltage and current sources
- Optical networking
- Automatic test equipment
- Mobile communications
- Programmable attenuators
- Industrial process control